EE 355
Electronics I
Table of Contents
Specific Course Topics
Topics include : Semiconductors, diodes, bipolar junction transistors, field-effect transistors, analysis and design of small-signal single stage amplifiers and digital logic circuits. The laboratory portion will cover diode circuits, BJT/FET biasing schemes, and BJT/FET small-signal amplifier configurations.
Class/laboratory Schedule:
(2) 75 minute lectures and (1) two-hour laboratory each week
Prerequisite:
EE 223 - Electrical Circuit Analysis II
Textbook:
Sedra/Smith, "Microelectronic Circuits," 4th ed.
Course Objectives1:
1. Develop a basic understanding of the theory of semiconductors and electronic
devices [A]
2. Develop the skills necessary to analyze and design electronic circuits and systems
[A,B,C]
3. Develop a familiarity with the performance characteristics of basic integrated circuit
classes [A]
4. Develop laboratory skills in the construction and analysis of electronic circuits
[A,B,C,D,E]
1
Letters in brackets correspond to departmental program objectivesIntroduction/PSpice
Semiconductors
Energy band diagrams
Intrinsic and extrinsic semiconductors
Conductivity, resistivity, and mobility
PN junction characteristics
PN junction biasing
Diode current equation
Diode circuit analysis
Breakdown
Diode applications
Transistor introduction
BJT characteristics, operating states, equations
BJT biasing
BJT small signal model
BJT CB, CE, CC amplifiers
BJT amplifier gain, input impedance, output impedance
JFET characteristic curves and equations
D-MOSFET characteristic curves and equations
E-MOSFET characteristic curves and equations
FET small signal models
FET amplifiers
MESFET
Digital circuits
for Objective 1:
a. Students will demonstrate an
understanding of basic semiconductor theory, including the concepts of energy band
diagrams, mobility, etc.
b. Students will demonstrate an understanding
of pn junction operation, biasing, and current.
c. Students will demonstrate an understanding
of the internal semiconductor characteristics of diodes and BJT/FET transistors.
for Objective 2:
a. Students will demonstrate an
understanding of diode and BJT/FET operating modes.
b. Students will demonstrate an understanding
of electrical modeling of diodes and BJT/FET transistors.
c. Students will demonstrate an understanding
of electrical circuit analysis, as applied to the DC and AC evaluation of circuits
containing diodes and
BJT/FET transistors.
for Objective 3:
a. Students will demonstrate an
understanding of characteristic curves and equations associated with diodes and BJT/FET
transistors.
b. Students will demonstrate an understanding
of the characteristics of BJT and FET operating configurations, including CB, CE, CC, CS,
and CD.
for Objective 4:
a. Students will demonstrate an ability to
apply course concepts to the understanding of laboratory circuits, containing diodes and
BJT/FET transistors.
b. Students will demonstrate an ability to
simulate, construct, test, evaluate, and troubleshoot circuits in the laboratory
environment.
c. Students will demonstrate the ability to
prepare technical reports.
Contact Information:
Office : 430 Nichols Hall
Phone : 464-7343 (office)
464-3961 (home)
E-Mail : addingtonjs@mail.vmi.edu
Office Hours:
Monday : 0900-1100
Tuesday/Thursday : 0930-1100
Wednesday : 0900-1100, 1400-1600
Friday : 0900-1100
(and by appointment)
Lecture Policies:
Homework - Usually assigned once a week
Tests - Three; during regular class time
Final - Comprehensive
No make-up tests will be given.
Late homework will be graded accordingly.
Lecture Grading Policy |
Laboratory Grading Policy |
| Homework = 15% | Lab Reports = 65% |
| Tests = 50% | Final Project = 35% |
| Final = 35% | |
| Lecture Grade = 100% | Laboratory Grade = 100% |
Overall Course Grade |
| Lecture Grade = 2/3 |
| Laboratory Grade = 1/3 |
| Overall Grade = 3/3 |
(1)
"Cadets' Responsibilities"
"Work for grade" is defined as any
work presented to an instructor for a formal grade or undertaken
in satisfaction of a requirement for successful completion of a course or degree
requirement. All work submitted for grade is considered the cadet's own
work. "Cadet's own work"
means that he or she has composed the work from his or her general accumulation
of knowledge and skill except as clearly and fully documented and that it has
been composed especially for the current assignment. No work previously submitted in any course at VMI or
elsewhere will be resubmitted or reformatted for submission in a current course
without the specific approval of the instructor.
In all work for grade, failure to distinguish between the cadet’s own work and
ideas and the work and ideas of others is known as plagiarism.
Proper documentation clearly and fully identifies the sources of all
borrowed ideas, quotations, or other assistance. The
cadet is referred to the VMI-authorized handbook for rules concerning
quotations, paraphrases, and documentation.
In all written work for grade, the cadet must include the words "HELP
RECEIVED" conspicuously on the document, and he or she must then do one
of two things: (1) state
“none,” meaning that no help was received except as documented in the work;
or (2) explain in detail the nature of the help received.
In oral work for grade, the cadet must make the same declaration before
beginning the presentation. Admission
of help received may result in a lower grade but will not result in prosecution
for an honor violation.
Each cadet bears the responsibility for familiarizing himself or herself
thoroughly with the policies stated in this section, with any supplementary
statement regarding work for grade expressed by the academic department in which
he or she is taking a course, and with any special conditions provided in
writing by the professor for a given assignment.
If there is any doubt or uncertainty about the correct interpretation of
a policy, the cadet should consult the instructor of the course. There
should be no confusion, however, on the basic principle that it is never
acceptable to submit someone else’s work, written or otherwise, formally
graded or not, as one’s own.
The violation by a cadet of any of these
policies will, if he or she is found guilty by the Honor Court, result in his or
her being dismissed from VMI. Neither
ignorance nor professed confusion about the correct interpretation of these
policies is an excuse.
(3)
Faculty Policies
(a)
Peer Collaboration:
Peer collaboration is not permitted for this course.
All homeworks are certified as
your own, independent work. You may not
receive assistance from any sources other than your instructor and any sources authorized by your
instructor. You may discuss general course
concepts with each other; however, you may not discuss specific assigned problems.
All lab work is certified as the
work of the lab group only. You may not
receive assistance from any sources other than your instructor and any sources authorized
by your instructor. You may discuss general
lab concepts and procedures with each other; however, you may not share lab data.
All tests and exams are
certified as your own, independent work.
(b)
References:
Students must properly reference
direct quotations (with quotation marks and source), as well as significant paraphrasing
(with source).
Unless a direct quotation is
necessary, put the information in your own words to demonstrate your understanding of the
material.
See "Easy Access" for
more information regarding quotations and proper paraphrasing.
(c)
Other:
Lab reports are due the week after the experiment is performed.
Come to the labs
prepared, i.e. with preliminary work completed, so you may immediately begin
with the experimental work. Pre-lab work will be graded at the start
of each laboratory session on a 0-1-2 scale.
Use your lecture material to aid in the preparation of your lab reports.
| August 26 | Introduction (Lab equipment, procedures) (no prelab) |
| September 2 | PSpice Review (no prelab) |
| September 9 | Diode |
| September 16 | Diode Circuits |
| September 23 | Power Supply Design |
| September 30 | BJT Biasing |
| October 7 | BJT Biasing |
| October 14 | BJT Amplifiers |
| October 28 | BJT Amplifiers |
| November 4 | JFET Biasing |
| November 18 | MOSFET Biasing |
| November 25 | FET Amplifiers |
| December 2 | Final Project |
| December 9 | Final Project |
| I. Introduction : | What is the experiment about? |
| What are the objectives? | |
| II. Background : | Important concepts, theories, equations used in the experiment |
| III. Preliminary Work : | Hand calculations, designs, simulations, etc. |
| What are the expected results? | |
| IV. Experimental Work : | What are the experimental procedures? |
| V. Results : | Numbers, tables, graphs, answers to questions, etc. as dictated by the lab manual/instructor |
| VI. Conclusions : | What do the results mean? |
| Were the objectives met? |
Homework #1 Laboratory #1 Laboratory #8
Homework #2 Laboratory #2 Laboratory #9
Homework #3 Laboratory #3 Laboratory #10
Homework #4 Laboratory #4 Final Project
IMAPS (International Microelectronics And Packaging Society)Home Page
IEEE Components, Packaging, and Manufacturing Technology Society Home Page
SMT (Surface Mount Technology) Magazine Web Site
Advanced Packaging Magazine Web Site
Solid State Technology Magazine Web Site
Scientific American Special Issue : "The Solid State Century"
Mobility Chart (print in landscape mode) (ref: Yang, Microelectronic Devices)
Last modified by Shawn Addington on 09/05/03